1. Field of the Invention
The present invention relates to an ECL (emitter coupled logic) output circuit.
2. Description of Related Art
One typical ECL output circuit includes a current switch circuit composed of a pair of transistors connected in the form of simple differential circuit, and an emitter follower composed of a third transistor receiving an output of the current switch circuit (See "LSI Handbook" edited by Electronics and Communication Society in Japan and published by OHM-sha in 1984, page 464, FIG. 1.26).
In ordinary cases, a pull-down resistor is connected to an output terminal of the emitter follower so as to form an ECL interface. Generally, the pull-down resistor is 50.OMEGA. and terminated to -2 V. In addition, the ECL output circuit is featured in that the emitter follower can can easily realize a wired-OR.
When the above mentioned ECL output circuit is used to form the wired-OR or when a plurality of ECL output circuits are connected to the same bus, a low level voltage of an output voltage elevates, and therefore, an operating margin such as "fan-out number" decreases. In order to avoid this problem, if the low level voltage is set to -1.9 V which is lower than an ordinary low level voltage of -1.6 V, a switching is delayed because of an increased voltage difference, in comparison with the case in which the low level voltage is the ordinary low level voltage of -1.6 V and the high level voltage is an ordinary high level voltage -0.8 V.